It can be appreciated that different design rules are applied on areas of semiconductor devices operating at different voltage levels. For example, in a mixed signal design an isolated P-well and an N isolation ring may operate at voltages different from that of the global substrate, for example. Accordingly, it can be appreciated that it is important to test the different areas to see if they comply with respective voltage rules. Such voltage rules are generally implemented in software that is applied to a proposed design layout. Stated another way, a proposed layout (e.g., for a mixed signal circuit) is run through certain voltage dependent design rule software whereby a ‘red flag’ is raised if certain voltage rule requirements are not met or certain voltage rules are otherwise violated.
Nevertheless, it would be desirable to provide improvements in the manner in which such voltage rules are communicated between circuit schematics and the resultant layout.